In conventional planar integrated circuit fabrication technology, in order to increase the current capacity of a field effect transistor, one must expand the width of the channel region in a direction parallel to the gate to get increased parallel current flow between the source and the drain of the device. Enhancement of the current capacity of a transistor has therefore usually meant increased occupation of semiconductor chip "real estate." A need continues to exist for transistors exhibiting enhanced current carrying capacity but which do not have enhanced expense in terms of the semiconductor chip area that they occupy.